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Papilio DUO – Program with AVR Dragon

Posted by: Jack Gassett , August 28, 2014

Learn how to use the AVR Dragon debugger to set fuses, load hex files, and debug the ATmega32U4 chip on the Papilio DUO.

Dragon Cover

Information

Dragon ISP Interface

Dragon JTAG Interface

FT2232H Datasheet

FT2232H Datasheet MPSSE Pins

 

Default Fuse settings for Leonardo

leonardo.bootloader.low_fuses=0xff
leonardo.bootloader.high_fuses=0xd8
leonardo.bootloader.extended_fuses=0xcb

Warning – Do not disable both the SPIEN and JTAGEN fuses or you will have a very hard to recover ATmega32u4 chip.

Default Fuse settings for Papilio DUO

duo.bootloader.low_fuses=0xff
duo.bootloader.high_fuses=0x98
duo.bootloader.extended_fuses=0xcb

Notes

Putting pullup resistor on the reset pins in the ucf file makes the ATmega32U4 run when the Dragon is not connected.

NET DRAGON_SPI_RESET LOC=”P79″ | IOSTANDARD=LVTTL | DRIVE=8 | PULLUP | SLEW=SLOW;

NET ARD_RESET LOC=”P139″ | IOSTANDARD=LVTTL | DRIVE=8 | PULLUP | SLEW=SLOW; # ARD_RESET

NET DRAGON_JTAG_RESET LOC=”P51″ | IOSTANDARD=LVTTL | DRIVE=8 | PULLUP | SLEW=SLOW;

Setup

Connect Dragon to the DUO

To connect the Dragon to the DUO turn the Dragon upside down and line up pin 1 of the Dragon’s JTAG port with pin 53 of the Papilio DUO. If this is done correctly then all of the pins for the ISP and JTAG ports will be connected to the Papilio DUO at once.

Warning – DO NOT allow any of the Dragon pins connect to the Wingslot power pins. The power pins are the 4 position headers that are staggered along pins 22-53.

Program using SPI/ISP Mode

Open Papilio DesignLab and find the Papilio_DUO_AVR_Dragon_Debug_SPI example.

You can open the design in Xilinx ISE and generate the bit file or just find the bit file in the LX9 directory.

Make sure the Dragon is not plugged in yet and load the bit file to SPI Flash.

Plug in the Dragon

Open AVR Studio – we are using AVR Studio 4 in the example video.

Go to tools/program avr/connect.

Select ATmega32U4 as the Device type.

Set the mode to ISP

Click Read Signature.

If it reads the signature then all features should be available.

Program using JTAG Mode

Open Papilio DesignLab and find the Papilio_DUO_AVR_Dragon_Debug_JTAG example.

You can open the design in Xilinx ISE and generate the bit file or just find the bit file in the LX9 directory.

Make sure the Dragon is not plugged in yet and load the bit file to SPI Flash.

Plug in the Dragon

Open AVR Studio – we are using AVR Studio 4 in the example video.

Go to tools/program avr/connect.

Select ATmega32U4 as the Device type.

Set the mode to JTAG

Click Read Signature.

If it reads the signature then all features should be available.

 

 

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